llvm / llvm/llvm-project

[X86] Failure to fold or disjoint nodes into a AVX512 predicated add instruction

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#164,161 13 comments 0 reactions 1 assignee Claimed by @xyz-harshal View on GitHub
backend:X86 good first issue missed-optimization
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Description

https://gcc.godbolt.org/z/63scvzTGT
```ll
define <64 x i8> @select_add(<64 x i8> %0, <64 x i8> %1) {
%add0 = add <64 x i8> %0,
%add1 = add <64 x i8> %1,
%icmp = icmp ult <64 x i8> %add0,
%res = select <64 x i1> %icmp, <64 x i8> %add1, <64 x i8> %add0
ret <64 x i8> %res
}

define <64 x i8> @select_or(<64 x i8> %0, <64 x i8> %1) {
%add0 = add <64 x i8> %0,
%add1 = or disjoint <64 x i8> %1,
%icmp = icmp ult <64 x i8> %add0,
%res = select <64 x i1> %icmp, <64 x i8> %add1, <64 x i8> %add0
ret <64 x i8> %res
}
```
While the select_add case correctly folds an add into a predicated instruction:
```s
select_add: # @select_add
vpaddb .LCPI0_0(%rip), %zmm0, %zmm0
vpcmpltub .LCPI0_1(%rip), %zmm0, %k1
vpaddb .LCPI0_2(%rip), %zmm1, %zmm0 {%k1}
retq
```
Using an add-like or-disjoint node fails to fold into the same add predicated instruction:
```s
select_or: # @select_or
vpaddb .LCPI1_0(%rip), %zmm0, %zmm0
vpord .LCPI1_3(%rip){1to16}, %zmm1, %zmm1
vpcmpltub .LCPI1_2(%rip), %zmm0, %k1
vmovdqu8 %zmm1, %zmm0 {%k1}
retq
```

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