Live session encoding runs on CPU only, never invokes app's live handler (transcode/ffmpeg example)

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## Summary

Running the `transcode/ffmpeg` example app (app-examples, rs/av1-transcode branch) with GPU encoders configured (`--av1-encoder av1_nvenc`, etc.). Batch jobs correctly use NVENC/NVDEC (confirmed via nvidia-smi). Live/trickle sessions never touch the GPU at all — confirmed via nvidia-smi (0% enc/dec/sm) during multiple simultaneous active live sessions that are billing normally.

## Investigation

Added logging inside `runner.py`'s `_handle_live()` (the aiohttp POST `/transcode/live` handler) to trace encoder selection per session. The log never fires, despite live sessions being actively established and paid — confirmed via `docker logs`, zero hits.

Checked established TCP connections on the runner container: the orchestrator is pushing data directly into the runner's internal port (8990), and the container shows real CPU usage (~17%) and heavy network I/O consistent with active software encoding — so processing is happening, just never through the app's HTTP route.

This suggests either:
1. The orchestrator's live-runner trickle plumbing bypasses the app's `/transcode/live` endpoint entirely for already-established sessions, going through some other mechanism, or
2. There's a separate code path for encoder selection on the live side that isn't reachable via the `--av1-encoder`/`--h264-encoder`/`--h265-encoder` flags at all.

## Question

Where does encoder selection actually happen for live/trickle sessions in this architecture? Is GPU encoding on the live path currently reachable for app developers, or is it CPU-only by design at this stage?

Happy to share full logs/config if useful.

Start with the transcode/ffmpeg example and runner.py, especially _handle_live() and the aiohttp POST /transcode/live handler; trace how established sessions reach port 8990 and where the encoder flags are consumed. Done means identifying the live/trickle encoder-selection path and establishing whether GPU encoding is reachable or CPU-only by design.

Written by the indexing model from the issue text.