livepeer / livepeer/go-livepeer
SIGILL from GMP on Celeron processors while GPU transcoding
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Description
go-livepeer appears to be crashing on some older CPU architectures — specifically Celeron G3930. Update from comments: this appears to be originating from the GMP we ship within our static go-livepeer binary. It also only shows up when we're doing GPU transcoding. I do not know why.
Error is:
I0214 23:17:53.076123 1 lb.go:75] LB: Creating transcode session for a2e0a4af-1f2c-4f93-b56d-62178e6f4c58
I0214 23:17:53.076168 1 lb.go:109] LB: Created transcode session for a2e0a4af-1f2c-4f93-b56d-62178e6f4c58_0
I0214 23:17:53.076178 1 lb.go:202] LB: Transcode submitted for a2e0a4af-1f2c-4f93-b56d-62178e6f4c58_0
SIGILL: illegal instruction
PC=0x12805a4 m=3 sigcode=2
goroutine 0 [idle]:
runtime: unknown pc 0x12805a4
stack: frame={sp:0x7f1f2f7349f0, fp:0x0} stack=[0x7f1f2b73a288,0x7f1f2f739e88)
Here's a gist with the full logs: https://gist.github.com/iameli/be4ae26f06f906678556f3e91a16e5a7
> cat /proc/cpuinfo
processor : 0
vendor_id : GenuineIntel
cpu family : 6
model : 158
model name : Intel(R) Celeron(R) CPU G3930 @ 2.90GHz
stepping : 9
microcode : 0xca
cpu MHz : 2900.008
cache size : 2048 KB
physical id : 0
siblings : 2
core id : 0
cpu cores : 2
apicid : 0
initial apicid : 0
fpu : yes
fpu_exception : yes
cpuid level : 22
wp : yes
flags : fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm pbe syscall nx pdpe1gb rdtscp lm constant_tsc art arch_perfmon pebs bts rep_good nopl xtopology nonstop_tsc cpuid aperfmperf tsc_known_freq pni pclmulqdq dtes64 monitor ds_cpl vmx est tm2 ssse3 sdbg cx16 xtpr pdcm pcid sse4_1 sse4_2 x2apic movbe popcnt tsc_deadline_timer aes xsave rdrand lahf_lm abm 3dnowprefetch cpuid_fault epb invpcid_single pti ssbd ibrs ibpb stibp tpr_shadow vnmi flexpriority ept vpid fsgsbase tsc_adjust smep erms invpcid mpx rdseed smap clflushopt intel_pt xsaveopt xsavec xgetbv1 xsaves dtherm arat pln pts hwp hwp_notify hwp_act_window hwp_epp md_clear flush_l1d
bugs : cpu_meltdown spectre_v1 spectre_v2 spec_store_bypass l1tf mds swapgs itlb_multihit
bogomips : 5808.00
clflush size : 64
cache_alignment : 64
address sizes : 39 bits physical, 48 bits virtual
power management:
processor : 1
vendor_id : GenuineIntel
cpu family : 6
model : 158
model name : Intel(R) Celeron(R) CPU G3930 @ 2.90GHz
stepping : 9
microcode : 0xca
cpu MHz : 2900.000
cache size : 2048 KB
physical id : 0
siblings : 2
core id : 1
cpu cores : 2
apicid : 2
initial apicid : 2
fpu : yes
fpu_exception : yes
cpuid level : 22
wp : yes
flags : fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm pbe syscall nx pdpe1gb rdtscp lm constant_tsc art arch_perfmon pebs bts rep_good nopl xtopology nonstop_tsc cpuid aperfmperf tsc_known_freq pni pclmulqdq dtes64 monitor ds_cpl vmx est tm2 ssse3 sdbg cx16 xtpr pdcm pcid sse4_1 sse4_2 x2apic movbe popcnt tsc_deadline_timer aes xsave rdrand lahf_lm abm 3dnowprefetch cpuid_fault epb invpcid_single pti ssbd ibrs ibpb stibp tpr_shadow vnmi flexpriority ept vpid fsgsbase tsc_adjust smep erms invpcid mpx rdseed smap clflushopt intel_pt xsaveopt xsavec xgetbv1 xsaves dtherm arat pln pts hwp hwp_notify hwp_act_window hwp_epp md_clear flush_l1d
bugs : cpu_meltdown spectre_v1 spectre_v2 spec_store_bypass l1tf mds swapgs itlb_multihit
bogomips : 5808.00
clflush size : 64
cache_alignment : 64
address sizes : 39 bits physical, 48 bits virtual
power management:
Contributor guide
First steps
- Read the whole issue, then the project's contributing guide.
- Comment on the issue to say you are picking it up — it saves two people doing the same work.
- Fork the repository and make your change on a branch.
- Open a pull request that references the issue number.
Research direction
Start at the transcode-session flow referenced in lb.go:75, lb.go:109, and lb.go:202, then review the static binary's shipped GMP and the full crash logs in the linked gist. Reproduce GPU transcoding on an Intel Celeron G3930 and identify a build or runtime change that prevents the SIGILL on that CPU; done means the transcode completes without the illegal-instruction crash.
Written by the indexing model from the issue text.
Assessment
- Tech stack
- go
- Domain
- backend
- Issue type
- Bug
- Difficulty
- 4/5
- Estimated time
- 3-5 days
- Activity status
- Stale
- Clarity
- Needs clarification
- Newbie friendliness
- 25/100