Add ENABLE_DDR_2X_REFRESH support for Sandy/Ivy bridges
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enhancement / improvement
security
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Description
@Th3Fanbus (Haswell feature activation) how much would cost such port of feature to those Sandy/Ivy bridge, even possible?
Doc:https://coreboot.org/status/kconfig-options.html
Past commits for Haswell:https://github.com/coreboot/coreboot/search?q=ENABLE_DDR_2X_REFRESH&type=Commits
Contributor guide
First steps
- Read the whole issue, then the project's contributing guide.
- Comment on the issue to say you are picking it up — it saves two people doing the same work.
- Fork the repository and make your change on a branch.
- Open a pull request that references the issue number.
Research direction
Start with the coreboot Kconfig options documentation and the linked Haswell commits for ENABLE_DDR_2X_REFRESH. Then determine whether Sandy/Ivy Bridge support is technically possible and what the port would require. Done would mean a decided implementation scope or a documented conclusion that the feature cannot be supported.
Written by the indexing model from the issue text.
Assessment
- Domain
- embedded-iot
- Issue type
- Feature
- Difficulty
- 5/5
- Estimated time
- Over a week
- Activity status
- Stale
- Clarity
- Needs clarification
- Newbie friendliness
- 20/100