coreboot payload should be first in the ROM image
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Nobody has claimed this yet.
enhancement / improvement
- Dominant language
- Makefile
- Stars
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- Forks
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- Avg merge
- 4d 21h
- Merged PRs (30d)
- 6
Description
The default coreboot ROM layout mixes up romstage and ramstage pieces. They should be separated, especially so that the key ones can be locked with the SPI flash BP bits (once issue #12 is resolved)
Contributor guide
First steps
- Read the whole issue, then the project's contributing guide.
- Comment on the issue to say you are picking it up — it saves two people doing the same work.
- Fork the repository and make your change on a branch.
- Open a pull request that references the issue number.
Research direction
Start by tracing the default coreboot ROM layout in the repository's build configuration and compare the ordering of the romstage and ramstage pieces. Check issue #12 for the SPI flash BP-bit dependency. Done means the coreboot payload is first, the pieces are separated, and the key regions can be locked as intended.
Written by the indexing model from the issue text.
Assessment
- Domain
- build-system, operating-systems
- Issue type
- Bug
- Difficulty
- 4/5
- Estimated time
- 3-5 days
- Activity status
- Stale
- Clarity
- Mostly clear
- Newbie friendliness
- 25/100