VI Interrupt still being raised even with VI_STATUS_REG bits [1:0] set to 0

I am under the belief that this is all one big cheat (as it will always be since this is an emulator) ...

But in vi_controller.c

void vi_vertical_interrupt_event(struct vi_controller* vi)
{
   gfx.updateScreen();

   /* allow main module to do things on VI event */
   new_vi();

   /* toggle vi field if in interlaced mode */
   vi->field ^= (vi->regs[VI_STATUS_REG] >> 6) & 0x1;

   /* schedule next vertical interrupt */
   if (vi->regs[VI_V_SYNC_REG] == 0)
      vi->delay = 500000;
   else
      vi->delay = (vi->regs[VI_V_SYNC_REG] + 1) * g_vi_refresh_rate;

   vi->next_vi += vi->delay;

   add_interrupt_event_count(VI_INT, vi->next_vi);

   /* trigger interrupt */
   raise_rcp_interrupt(vi->r4300, MI_INTR_VI);
}

it seems the cheat here is to wait then reinterrupt when the vblank period would be assumed to be called by the TV.
However, in https://en64.shoutwiki.com/wiki/VI_Registers_Detailed#VI_CONTROL_REG.2FVI_STATUS_REG_.280x00.29.
It says that VI_STATUS_REG bits [1:0] set to 0 would prevent syncing.

Would it be fine to only raise the interrupt under the condition that VI_STATUS_REG bits [1:0] is not 0? So we would still be generating vi interrupt signal, just not actually raising the MI register. This way it is a bit more accurate. This might be causing an issue for a mod a friend of mine has been working on. I think.

Start in vi_controller.c at vi_vertical_interrupt_event and inspect how VI_STATUS_REG bits [1:0] relate to the scheduled VI interrupt and raise_rcp_interrupt call. Compare this behavior with the linked VI register specification, then validate whether zero-valued bits should suppress the MI interrupt while preserving VI event processing.