intel / intel/vision-drivers

HOST_SET_MIPI_CONFIG needed for HM1092 IR sensor on Panther Lake (CVS blocks data lane)

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Description

## Summary
On Dell XPS Panther Lake, the Synaptics CVS SoC (INTC10E1) blocks MIPI CSI-2 data from the HM1092 IR sensor because `HOST_SET_MIPI_CONFIG` (command 0x0830) is never sent by the `intel_cvs` driver.

## Details
- CVS device capability `0xD200` has `HOST_MIPI_CONFIG_REQUIRED` (bit 15) = **true**
- The `intel_cvs` driver defines the `HOST_SET_MIPI_CONFIG = 0x0830` command but **never sends it**
- The Windows `Vision.sys` driver sends this command with **176 bytes** of data during camera initialization
- Without it, the CSI-2 data lane stays in stop state — clock lane works, data doesn't

## Evidence
```
csi 2 PHY_RX = 0x00010000 ← receiver active
csi 2 PHY_STOPSTATE = 0x00010001 ← clock active, DATA IN STOP
csi 2 PHY_CAL = 0x00000000 ← HS calibration never completes
```

The sensor (HM1092, I2C 0x24) is properly initialized — chip ID reads, PLL configured, mode_select=streaming. But no data reaches the IPU7 because the CVS is blocking.

## Request
1. What is the data format for `HOST_SET_MIPI_CONFIG` on CVS protocol v2.2?
2. Should the `intel_cvs` driver send this command automatically when `HOST_MIPI_CONFIG_REQUIRED` is set?
3. Is this the same format as the Intel IVSC `csi_link_cfg` (16 bytes: nr_lanes, link_freq, rsvd[2]) or a different Synaptics-specific format (176 bytes)?

## Related
- intel/ipu7-drivers#64 — full HM1092 IR sensor driver development
- INT3472 GPIO type 0x02 (IR LED) support — upstream patch pending

## System
- Dell XPS 16, Panther Lake
- CVS: Synaptics SVP7500 (06cb:0701), protocol 2.2, capability 0xD200
- Sensor: Himax HM1092 (HIMX1092:00), chip ID 0x1091
- Kernel: 7.0.0-rc7

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