intel / intel/rohd

Add automation to help with `List`s of signals as ports of a module

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enhancement good first issue
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Description

### Motivation

There are scenarios where it's convenient to use a `List`, especially as an argument to functions or constructors for modules. Keeping it as a `List` requires iterating through all the signals to punch associated ports. It would be nice to have some automation help with this.

### Desired solution

One option might be to add a way to construct a `LogicArray` from a `List`, which would make it easier to convert a `List` argument to a `LogicArray` port.

An alternative/addition might be to add something like `addInputList` which automates punching a list of ports, with associated renaming.

### Alternatives considered

_No response_

### Additional details

_No response_

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