It's possible for two modules to be submodules of each other

### Describe the bug

It is possible to set up port connectivity between two `Module`s such that after `build` each of the modules have the other listed as a sub-module (in `subModules`). This should be caught at build time. When the synthesizer starts parsing the module hierarchy, it falls into an infinite loop with no helpful error message.

### To Reproduce

Need to build a good example, but this was observed first in some code which had perhaps misconnected input and output ports to what was intended to be a submodule.

### Expected behavior

This should be flagged at build time as an error with as much explanation as possible so the user can correct the connectivity.

### Actual behavior

Silent incorrect behavior at `build` and infinite loop at `generateSynth`.

### Additional: Dart SDK info

_No response_

### Additional: pubspec.yaml

_No response_

### Additional: Context

Present in v0.4.2