intel / intel/rohd

Time stamps are not created when the input signal is unchanged

Open
#162 0 comments 0 reactions 0 assignees View on GitHub
bug
Dominant language
Dart
Stars
489
Forks
88
Avg merge
3d 23h
Merged PRs (30d)
10

Description

## Describe the bug

Time stamps are not created with a constant input signal, which is why the timing diagram does not represent the actual simulation process.

## To Reproduce

Use code:

```dart
import 'package:rohd/rohd.dart';

class ExampleModule extends Module {
ExampleModule(Logic inputA) {
inputA = addInput('input_a', inputA);
final out = addOutput('out');

Combinational([
out < inputA,
]);
}

Logic get out => output('out');
}

Future main() async {
Logic inputA = Logic();
final exampleModule = ExampleModule(inputA);
await exampleModule.build();
WaveDumper(exampleModule);
SimpleClockGenerator(2);
inputA.inject(1);
await Simulator.tick();
await Simulator.tick();
await Simulator.tick();
await Simulator.tick();
await Simulator.tick();
/*
inputA.inject(0);
await Simulator.tick();
await Simulator.tick();
*/
}
```

Open `waves.vcd` in viewer.

## Expected behavior

The VCD file saved the signal history for each simulation step.

## Actual behavior

The VCD file retained only step 0.

## Additional details

```text
Dart SDK version: 2.18.0 (stable) (Fri Aug 26 10:22:54 2022 +0000) on "linux_x64"
```

```yaml
name: package

environment:
sdk: '>=2.14.0 <3.0.0'

dependencies:
rohd: ^0.3.2
```

Contributor guide

Open the contributing guide

Assessment

This issue has not been assessed yet.

Get new issues in your inbox

A short digest of beginner-friendly GitHub issues.