CSR field access writeOnesClear is documented but not implemented

`CsrFieldAccess.writeOnesClear` (\`lib/src/memory/csr/csr_access.dart\`) and
\`doc/components/csr.md\` both document the standard hardware "write-1-to-clear"
(W1C) semantic: the field reads normally, software writes of \`0\` have no
effect, and software writes of \`1\` clear the corresponding bit(s) to \`0\`.

However, \`Csr.getWriteData()\` (\`lib/src/memory/csr/csr.dart\`) treats
\`writeOnesClear\` identically to \`readOnly\`:

```dart
final chk2 = fields[currField].access == CsrFieldAccess.readOnly ||
fields[currField].access == CsrFieldAccess.writeOnesClear;
if (chk2) {
finalWd = finalWd.withSet(currIdx, elements[i]); // always keep current value
currField++;
currIdx += elements[i].width;
continue;
}
```

This always substitutes the *current* register value for the field,
regardless of what is written. As a result, writing `1`s to a
`writeOnesClear` field never clears it -- the documented side effect is
entirely unimplemented, and the field behaves as plain `readOnly` forever.

This can be reproduced with the existing test fixture in
`test/memory/csr_test.dart` (`'simple individual CSRs'`): fields
`field4_0`/`field4_1` are `writeOnesClear` bits within an 8-bit register
reset to `0xff`. Writing `0xab` (bit7=`1`) should clear bit7, but the
current code leaves it at `1`.

See proposed fix: caflore1/rohd-hcl#3

Start in lib/src/memory/csr/csr.dart, where Csr.getWriteData() handles readOnly and writeOnesClear, then review the writeOnesClear fields in test/memory/csr_test.dart. Update the behavior so zero writes preserve bits and one writes clear them, and confirm the simple individual CSRs test passes with the documented result.

Written by the indexing model from the issue text.