CSR block frontdoor decode requires power-of-two-aligned base addresses, but this is never validated

`CsrTop._buildLogic()` in `lib/src/memory/csr/csr_top.dart` decodes which block owns an incoming frontdoor address by masking off the low `offsetWidth` bits of the address and comparing to `block.baseAddr`, where `offsetWidth` is derived from the block's effective size rounded up to the next power of two. This only produces a correct match when `baseAddr` is itself aligned to `1 << offsetWidth`. `CsrTopConfig._validate()` never checks this, so a block configured with a non-aligned base address silently has its frontdoor write/read `en` permanently stuck `false` — every register in that block never responds to any read or write, with no error raised anywhere in configuration or elaboration.

Suggested fix: replace the power-of-two bitmask decode with a general range compare (`baseAddr <= addr < baseAddr + blockSize`) so blocks are not constrained to power-of-two-aligned placement. A tightly-related bug in `CsrTopConfig.minAddrBits()`, which under-computes required address width for non-aligned high base addresses (it only considers `baseAddr`, not `baseAddr + size - 1`), should be fixed alongside this.

Fix implemented in: caflore1/rohd-hcl#1

Read CsrTop._buildLogic() in lib/src/memory/csr/csr_top.dart and CsrTopConfig._validate() plus minAddrBits(). Confirm the address decode and required-width behavior for non-aligned base addresses; done means valid blocks respond to frontdoor reads and writes without power-of-two base alignment and the address width includes the block's upper address.

Written by the indexing model from the issue text.