Resolve race condition in RohdConnector during interactive debug and SV timeout
- Dominant language
- Dart
- Stars
- 29
- Forks
- 6
- PR merge metrics
- No merged PRs in 30d
Description
There is a block of code in rohd_connector.py which is designed to detect whether there was a timeout waiting for the SystemVerilog simulator to complete a tick:
```python
if not ready_to_read and self.mid_tick:
# not necessarily an error, since maybe SV simulator called $finish
print('Timeout waiting for tick to complete in Simulator!', flush=True)
self.shutdown()
break
```
This code is only necessary because sometimes simulators appear to not properly indicate to cocotb that the simulation has ended, so a graceful shutdown cannot be achieved (https://github.com/cocotb/cocotb/issues/3121).
The race condition appears if ROHD is being interactively debugged and fails to send the entirety of a tick's information (i.e. `not ready_to_read`) even though a tick is ongoing (i.e. `self.mid_tick`).
For most users, unless actively debugging ROHD Cosim itself, this will not be often hit.
Contributor guide
Research direction
Start in rohd_connector.py at the ready_to_read and self.mid_tick timeout block, then trace how interactive debugging sends tick information and how shutdown is triggered. Reproduce the incomplete-tick case with a SystemVerilog simulator; done means an in-progress tick is not shut down merely because its data arrives incompletely, while genuine simulator timeouts still terminate gracefully.
Written by the indexing model from the issue text.
Assessment
- Tech stack
- python
- Domain
- backend
- Issue type
- Bug
- Difficulty
- 4/5
- Estimated time
- 3-5 days
- Activity status
- Stale
- Clarity
- Needs clarification
- Newbie friendliness
- 35/100