Vector Length Restriction in SPIR-V and subsequent 'spv' dialect

SPIR-V Specification has a vector length restriction of size 2,3, or 4 components(https://www.khronos.org/registry/SPIR-V/specs/1.0/SPIRV.html#_universal_validation_rules).

> Vector types for can only be parameterized as having 2, 3, or 4 components, plus any additional sizes enabled by capabilities.
> Matrix types can only be parameterized with floating-point types.
> Matrix types can only be parameterized as having only 2, 3, or 4 columns.

As per validation rule, the MLIR 'spv' dialect also has vector length restriction of 2, 3, 4, 8, or 16 (https://mlir.llvm.org/docs/Dialects/SPIR-V/#spvfunctioncall-mlirspirvfunctioncallop).
[Note: We think 'spv' dialect allows vector length up to 16 as compared to SPIR-V specification of up to 4 is because SPIR-V specification allows matrix size of up to 4 columns (aka vectors), and each vector can have up to 4 elements, hence the 'spv' length restriction is 16]

However, to utilize Intel vector specific instructions (e.g., DPAS instructions), the vector size has to be increased, which is done by capability extension, 'VectorAnyINTEL' (OpCapability VectorAnyINTEL). The extension is part of the upstream llvm trunk.

Unfortunately, in MLIR 'spv' dialect, the original restriction of vector length (2, 3, 4, 8, 16) still exist (in the validation, even if necessary OpCapability is used), which makes it difficult to use 'spv' dialect to represent codes/instructions that requires vector of length more than 16. Since, SPIR-V specification allows us to extend the vector length using OpCapability, in 'spv' dialect:
1. Either, we can remove (or make it optional) the length restriction, or
2. allow a way to express the OpCapability specific changes to the validation rule.