intel / intel/llvm

[E2E] Redo CCS configuration in CCS-related tests

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Description

Recently E2E tests related to CCS configuration started to fail: https://github.com/intel/llvm/issues/18576

However, in hindsight, we set `ZEX_NUMBER_OF_CCS` to `0:4`, which unexpectedly causes issues:
- Battlemage only supports _up to_ 2 CCS'es at the same time; not all battlemage cards support this. CCS value of 1 actually results in the test failures in #18576 to pass
- This is a test run on battlemage on a commit with `ZEX_NUMBER_OF_CCS=1` https://github.com/intel/llvm/actions/runs/15494019989/job/43626971531#step:17:1093
- GEN12 straight-up doesn't support `partition_properties`; I am not 100% certain but I don't think GEN12 even has the concept of a subslice. I'm not sure if `ZEX_NUMBER_OF_CCS` would even work.

Thus, the failing test
```
SYCL :: Adapters/level_zero/ext_intel_cslice.cpp
SYCL :: Adapters/level_zero/ext_intel_queue_index.cpp
SYCL :: Adapters/sycl-ls-uuid-subdevs.cpp
```
Should probably have their `ZEX_NUMBER_OF_CCS` value adjusted depending on GPU.

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