intel / intel/llvm

[Driver] Wrapper compilation drops target features

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bug confirmed
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Description

### Describe the bug

Currently the DPC++ driver uses `llc` to lower the IR module produced by `clang-offload-wrapper` to an object file. When doing so it ignores target features (none of the target features from the `cc1` clang invocation appear in the `llc` invocation). This is usually fine on x86, but other platforms (e.g. RISC-V) disallow linking object files with mismatching target features, for example compiling a program with `-march="rv64id"` leads to `can't link soft-float modules with double-float modules`.

### To reproduce

The issue can be reproduced by trying to cross-compile a SYCL program for RISC-V (with the `+d` extension enabled). On Ubuntu 22.04:
* install a RISC-V toolchain: `sudo apt install gcc-riscv64-linux-gnu g++-riscv64-linux-gnu`
* build DPC++ with `--host-target="X86;RISCV"` passed to `configure.py`

cross compile a SYCL program:

```
clang++ --target=riscv64-linux-gnu input.cpp -o out \
-march="rv64id" \
-fsycl -fsycl-targets=spir64 -isysroot=/usr/riscv64-linux-gnu
```

The command should fail with:
```
/usr/bin/riscv64-linux-gnu-ld: /tmp/sycl1-wrapper-347ec7.o: can't link soft-float modules with double-float modules
/usr/bin/riscv64-linux-gnu-ld: failed to merge target specific data of file /tmp/sycl1-wrapper-347ec7.o
clang++: error: linker command failed with exit code 1 (use -v to see invocation)
```

### Environment

OS: Ubuntu 22.04
Target device: spirv64

### Additional context

This is maybe something that we could address while switching to the `clang-linker-wrapper` approach in the driver. Maybe we could figure out the target features in the driver and add a `--mattr` flag to the `llc` invocation, or we could use `clang` instead of `llc` to lower the module that comes from `clang-offload-wrapper`. Another alternative is to generate the module in `clang-offload-wrapper` with the correct target features, which should allow to keep the call to `llc` as simple as it is now.

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