E823-C 1588 PTP timers issue/bug

Hello,
during PTP & SyncE evaluation on our project with E823-C, it seems the driver (version 1.16.3) has some issue with internal PTP nd PHY timers. When synced, 1PPS output has static offset (e.g. 1us against PTP&SyncE leader) and "big" deviation as ptp4l adjust internal frequency back and forth. Two consequent rising edges of 1PPS output can differ up to +/-150ns. CGU (DPLL ZL80032) provides stable clock into NAC with deviation less than +/-1ppb.

ptp4l[1660.604]: rms 224 max 351 freq +132 +/- 297 delay 47 +/- 0
ptp4l[1661.604]: rms 204 max 380 freq -27 +/- 272 delay 47 +/- 0
ptp4l[1662.606]: rms 190 max 313 freq +43 +/- 260 delay 30 +/- 0
ptp4l[1663.606]: rms 195 max 282 freq +106 +/- 260 delay -26 +/- 0
ptp4l[1664.606]: rms 244 max 423 freq -118 +/- 311 delay -26 +/- 0
ptp4l[1665.606]: rms 187 max 292 freq -42 +/- 257 delay -26 +/- 0
ptp4l[1666.607]: rms 236 max 413 freq -1 +/- 324 delay 9 +/- 0
ptp4l[1667.608]: rms 211 max 358 freq -28 +/- 290 delay 9 +/- 0
ptp4l[1668.608]: rms 180 max 274 freq +51 +/- 239 delay 25 +/- 0
ptp4l[1669.609]: rms 206 max 330 freq -19 +/- 283 delay -2 +/- 0

When the same test performed with Intel E810-XXVDA4T (same PTP&SyncE leader, same host system, same test scripts/parameters, same cabling,.....), time synchronization is within several nanoseconds.

ptp4l[4073.983]: rms 4 max 7 freq -0 +/- 6 delay 20 +/- 0
ptp4l[4074.970]: rms 4 max 6 freq +1 +/- 6 delay 19 +/- 0
ptp4l[4075.985]: rms 3 max 5 freq +1 +/- 4 delay 18 +/- 0
ptp4l[4076.979]: rms 4 max 7 freq +6 +/- 4 delay 16 +/- 0
ptp4l[4078.010]: rms 5 max 8 freq +2 +/- 6 delay 16 +/- 0
ptp4l[4078.983]: rms 4 max 8 freq -2 +/- 4 delay 18 +/- 0
ptp4l[4079.973]: rms 4 max 7 freq -4 +/- 5 delay 18 +/- 0
ptp4l[4081.042]: rms 3 max 6 freq -2 +/- 5 delay 18 +/- 0
ptp4l[4081.983]: rms 5 max 7 freq +2 +/- 6 delay 18 +/- 0
ptp4l[4083.003]: rms 4 max 6 freq +1 +/- 5 delay 18 +/- 0
ptp4l[4083.983]: rms 3 max 4 freq -2 +/- 4 delay 18 +/- 0

I made many testing trying to find root cause, but it looks there is something between NAC external clock input and PHY's HW timestamping - maybe incorrect configuration of CPK master timers and PHY timers?

Coincidentally, kernel ice driver (6.8.0-58) was used for additional test and works as expected - 1PPS output had no static offset and was stable, but SyncE seems to be not supported in this kernel driver. Anyway correct PTP behavior indicates potential Intel ice driver bug/issue.

Of course, there is still a quite big chance I'm doing something wrong and maybe driver needs to be set somehow to works correctly with E823-C. I'm HW engineer so my software skills are limited and not so deep. I'm aware that E823-C and E810 are very similar in some aspects, but also requires different approach in other aspects.....

Any idea what could be wrong?

Many thanks in advance!
Best Regards, Josef