intel / intel/confidential-computing.sgx

aesmd fails to start with SGX_IOC_ENCLAVE_INIT = 2

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Description

```
Feb 09 04:00:11 avalon aesm_service[2669]: [enclave_initialize sgx_enclave_common.cpp:878]
Feb 09 04:00:11 avalon aesm_service[2669]: SGX_IOC_ENCLAVE_INIT failed error = 2
Feb 09 04:00:11 avalon aesm_service[2669]: [reg_sig_handler sig_handler.cpp:189] signal handler is registered
Feb 09 04:00:11 avalon aesm_service[2669]: [__create_enclave /build/source/psw/urts/urts_com.h:332] add tcs 0x7f1d0f6cf000
Feb 09 04:00:11 avalon aesm_service[2669]: [ADMIN]White List update requested
```

Corresponding strace entries:
```
mprotect(0x7f53d90cf000, 12288, PROT_READ|PROT_WRITE) = 0
write(2, "build_contexts, step = 0x0000000"..., 42) = 42
write(2, "\tEntry Id( 0) = 4105, THREAD_GRO"..., 40) = 40
write(2, "Entry Count = 7, ", 20) = 20
write(2, "Load Times = 0, ", 19) = 19
write(2, "LStep = 0x0000000000037000\n", 27) = 27
mprotect(0x7f53d90e2000, 4096, PROT_READ|PROT_WRITE) = 0
ioctl(4, _IOC(_IOC_WRITE, 0xa4, 0x2, 0x18), 0x7ffccd992240) = 2
write(2, "[enclave_initialize sgx_enclave_"..., 87) = 87
openat(AT_FDCWD, "/nix/store/gkfmza880vl2wkhvpiwzvm03qss6a2kw-intel-sgx-psw-2.13/aesm/le_prod_css.bin", O_RDONLY) = 5
fstat(5, {st_mode=S_IFREG|0444, st_size=1808, ...}) = 0
fstat(5, {st_mode=S_IFREG|0444, st_size=1808, ...}) = 0
lseek(5, 0, SEEK_SET) = 0
read(5, "\6\0\0\0\341\0\0\0\0\0\1\0\0\0\0\0\206\200\0\0\26\6 \1\1\0\0`\0\0\0"..., 1808) = 1808
lseek(5, 1808, SEEK_SET) = 1808
close(5) = 0
ioctl(4, _IOC(_IOC_WRITE, 0xa4, 0x2, 0x18), 0x7ffccd992240) = 0
write(2, "[reg_sig_handler sig_handler.cpp"..., 67) = 67
```

It appears this specific ioctl to /dev/isgx is returning code 2 (ENOENT). Not sure what is happening here, as previous writes succeed.

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