Is `VPCLMULQDQ` instruction set necessary to run `l1app`?

Hi Maintenance Team,

I am running `l1app` but meet the following issue with a CPU without `VPCLMULQDQ` support (Xeon Gold 6226).

```
bbdev_dpdk_init:
DPDK cores mask 0x00000000000000000000000000000004
Calling rte_eal_init: ./l1app -c 0x00000000000000000000000000000004 -n2 --file-prefix=gnb0 --socket-mem=6144 --socket-limit=6144 -a0000:00:00.0 --vdev=baseband_turbo_sw --iova-mode=pa
ERROR: This system does not support "VPCLMULQDQ".
Please check that RTE_MACHINE is set correctly.
EAL: FATAL: unsupported cpu type.
EAL: unsupported cpu type.
EAL: Error - exiting with code: 1
Cause: Error with EAL initialization
Cleanup after [PID] 15257
```

`VPCLMULQDQ` additional instruction set was introduced with 3rd generation Xeon processors (Ice Lake) and is not part of the `AVX512` additional instruction set. I do not meet this issue with a 3rd generation processor (Xeon Gold 6348).

However, `README.md` said the L1 binary (`l1app`) was verified with Intel® Xeon® SkyLake/CascadeLake. They are 1st/2nd generation Xeon processors and do not support `VPCLMULQDQ`.

Therefore, I am confused. Is the L1 binary updated after `README.md`? Or do I targeting the wrong issue? Thanks for any hint!

P.S. [This document page](https://www.intel.com/content/www/us/en/developer/topic-technology/edge-5g/tools/flexran.html) also links to the document for 3rd generation Xeon processors though the page does not explicitly specify that 3rd gen Xeon is a requirement.