System Halt at Postcode 0xdd2b After IFWI Stitch with Slim Bootloader.

Description

During platform bring-up on Intel Raptor Lake (RPL-RVP), the system halts at postcode 0xDD2B after stitching Slim Bootloader into the IFWI image. No further boot progress is observed.

Environment
Platform: Intel Raptor Lake (RPL-RVP)
Slim Bootloader Version: v0.5
IFWI Base Image: IOTG_RPL_SR17_B0B1-ADPSADL_CPSF_SEP0_00580518_2025WW12.3.01_BE607304.bin
Build OS: Ubuntu 24.04
Toolchain: Python-based build (default Slim Bootloader tools)
Steps to Reproduce

Clone Slim Bootloader repository:

git clone https://github.com/slimbootloader/slimbootloader.git

Build Slim Bootloader for RPL:

python BuildLoader.py build rpl
Stitch Slim Bootloader into the IFWI image using stitching tools
Flash the stitched IFWI image onto the board
Power on the system and monitor POST codes

Observed Behavior:
System halts at postcode: 0xDD2B
No further boot progression

Expected Behavior:
System should proceed through early initialization and continue Slim Bootloader execution.

Debug Information
Postcode: 0xDD2B
Power Rails: Verified OK
SPI Flash Programming: Verified successful

Based on the early halt and postcode:

Possible failure during FSP-M (memory initialization / MRC)
Potential stitching configuration mismatch (FIT/XML, component offsets, region layout)
UPD configuration mismatch between SBL and IFWI
Early silicon init / power sequencing edge case

Questions
What does postcode 0xDD2B indicate in RPL/Slim Bootloader flow?
Is this IFWI version known to be compatible with Slim Bootloader v0.5?
What debug steps are recommended for failures occurring before UART output?
Are there specific debug build flags or trace options to enable early-stage visibility?

Thanks and Regards
Keshavamurthy K