indygreg / indygreg/python-zstandard

Add riscv64 (linux_riscv64) wheel to PyPI releases

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1d 14h
Merged PRs (30d)
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Description

## Add `linux_riscv64` wheel to PyPI releases

### Summary

`pip install zstandard` on riscv64 Linux currently requires building from source (~3 min on a 1.6 GHz RISC-V SoC). Adding `linux_riscv64` to the wheel build matrix would give riscv64 users a prebuilt wheel.

### Evidence

| | |
|---|---|
| **Tested wheel** | [`zstandard-0.25.0-cp313-cp313-linux_riscv64.whl`](https://github.com/gounthar/riscv64-python-wheels/releases/download/v2026.03.11-cp313/zstandard-0.25.0-cp313-cp313-linux_riscv64.whl) |
| **Hardware** | BananaPi F3 (SpacemiT K1, rv64imafdcv, 8 cores @ 1.6 GHz, 16 GB RAM) |
| **Python** | 3.13 (CPython) |
| **Build system** | cibuildwheel |
| **Build time** | ~3 min (native, on hardware) |

The wheel imports and passes basic smoke tests on riscv64 Linux.

### Suggested CI change

**Workflow**: `.github/workflows/wheel.yml`

Add `riscv64` to the linux arch matrix and extend the QEMU condition:

```yaml
# In strategy.matrix.arch, add:
arch:
- 'aarch64'
- 'i686'
- 'ppc64le'
- 's390x'
- 'x86_64'
- 'riscv64' # <-- add this

# Update the QEMU step condition:
- name: Set up QEMU
if: ${{ matrix.arch == 'ppc64le' || matrix.arch == 's390x' || matrix.arch == 'riscv64' }}
uses: docker/setup-qemu-action@...
```

Add exclusions for non-existent images:
```yaml
exclude:
- { arch: 'riscv64', image: 'manylinux2014' }
- { arch: 'riscv64', image: 'musllinux_1_1' }
```

### Ecosystem context

- `manylinux_2_39_riscv64` images are available on `quay.io/pypa/` (landed in pypa/manylinux, 2025)
- cibuildwheel 3.x supports riscv64 via QEMU emulation
- auditwheel supports riscv64 platform tags
- maturin-action supports `riscv64gc-unknown-linux-gnu` cross-compilation
- Packages already shipping riscv64 wheels on PyPI: aiohttp, yarl, regex, markupsafe, charset-normalizer, rpds-py, multidict, propcache, watchfiles, rignore, setproctitle
- RISC-V hardware is shipping: SiFive HiFive, SpacemiT K1/K3, Sophgo SG2044 (64-core)

### Our temporary index

While upstream support is pending, we maintain a [PEP 503 index](https://gounthar.github.io/riscv64-python-wheels/simple/) with 50+ riscv64 wheels for the Python ML/AI stack, built natively on RISC-V hardware.

Tracking repo: https://github.com/gounthar/riscv64-python-wheels

Contributor guide

Open the contributing guide

First steps

  1. Read the whole issue, then the project's contributing guide.
  2. Comment on the issue to say you are picking it up — it saves two people doing the same work.
  3. Fork the repository and make your change on a branch.
  4. Open a pull request that references the issue number.

Research direction

Start with .github/workflows/wheel.yml and inspect the existing architecture matrix, QEMU setup, and image exclusions. Extend the riscv64 entries as described, run the workflow, and verify that a linux_riscv64 wheel is built and released to PyPI with the existing smoke tests passing.

Written by the indexing model from the issue text.

Assessment

Tech stack
docker, github-actions, python
Domain
build-system, ci-cd
Issue type
Feature
Difficulty
3/5
Estimated time
1-2 days
Activity status
Quiet
Clarity
Clearly specified
Newbie friendliness
70/100

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