huggingface / huggingface/trl

Possible NCCL ordering issue in TRL colocate mode with trainer TP + vLLM TP during tool-calling rollout

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Description

### Reproduction

## Summary

I understand that my exact version combination is **not officially supported** at the moment.

That said, the behavior I am seeing seems like a more fundamental distributed issue that may still be worth discussing.

I am fine-tuning **Qwen3.5 27B** with:

- TRL colocate mode
- trainer-side Transformers TP via native `tp_plan="auto"`
- vLLM TP enabled
- multi-turn tool-calling rollout using a **custom TRL environment factory**

I also had to manually patch **weight path handling** and apply an **EOS token override** in my environment to make the setup run.

My concern is that this is not only a version-support issue. It seems like a more systematic NCCL ordering problem:

- vLLM TP uses its own communicator
- Transformers TP uses another communicator
- tool-calling rollout causes large per-rank variation in sequence length / turn count
- ranks may reach collective calls in different effective orders
- NCCL can halt

So even if the communicators are separate, variable rollout progress may still make this unsafe unless rollout and training phases are more strictly separated.

## Environment

- Model: **Qwen3.5 27B**
- CUDA: **12.6**
- TRL: **0.29.1**
- vLLM: **0.17.1** and **0.18.x**
- Note: I manually patched **weight path handling** and applied an **EOS token override** to run this setup

## Setup

Trainer-side model uses native Transformers TP:

~~~python
from transformers import AutoModelForCausalLM

model = AutoModelForCausalLM.from_pretrained(
"Qwen/Qwen3.5-27B",
dtype="auto",
tp_plan="auto",
)
~~~

TRL uses colocate mode with vLLM TP:

~~~python
from trl import GRPOConfig

config = GRPOConfig(
use_vllm=True,
vllm_mode="colocate",
vllm_tensor_parallel_size=4,
vllm_enable_sleep_mode=False,
)
~~~

## Observed behavior

The run can start correctly, but during multi-turn tool-calling rollout it may eventually hang with NCCL and stop making progress.

This becomes much more likely when both are enabled:

- trainer-side TP
- vLLM TP

## Core concern

This looks like a more fundamental issue than just my unsupported version combination.

In tool-calling rollout using the custom TRL environment factory:

- different samples may call tools different numbers of times
- intermediate sequence lengths can differ a lot
- different ranks may finish sampling at different times

If vLLM TP and trainer-side TP are both active, then two NCCL communicators may issue collectives under different rank progress. That may lead to inconsistent collective ordering across ranks and cause NCCL to halt.

## Suspected mitigation

It seems a stricter phase split is needed:

- Phase 1: vLLM rollout only
- barrier / synchronize
- wait until vLLM has fully finished sampling on all ranks
- Phase 2: trainer communication / training only

In short, it seems necessary to add an explicit barrier so that TRL does not begin its collective phase before vLLM has fully finished sampling.

### System Info

I request 2 GPU for running trl env, in training I using 4. The TRL and vllm is not official supported but I manually patch the model weight path so it will work.

Platform: Linux (Rocky Linux 9.5)
Python: 3.13.11
TRL: 0.29.1
PyTorch: 2.10.0
accelerator(s): NVIDIA H200, NVIDIA H200 ✓ (2 GPUs confirmed)
Transformers: 5.3.0
Accelerate: 1.13.0
Datasets: 4.8.2
HF Hub: 1.7.1
bitsandbytes: 0.49.1
DeepSpeed: 0.18.8
vLLM: 0.18.0

### Checklist

- [x] I have checked that my issue isn't already filed (see [open issues](https://github.com/huggingface/trl/issues?q=is%3Aissue))
- [x] I have included my system information
- [x] Any code provided is minimal, complete, and reproducible ([more on MREs](https://docs.github.com/en/get-started/writing-on-github/working-with-advanced-formatting/creating-and-highlighting-code-blocks))
- [x] Any code provided is properly formatted in code blocks, (no screenshot, [more on code blocks](https://docs.github.com/en/get-started/writing-on-github/working-with-advanced-formatting/creating-and-highlighting-code-blocks))
- [x] Any traceback provided is complete

Contributor guide

Open the contributing guide

Research direction

Start with the custom TRL environment factory and the GRPOConfig colocate-mode path, then reproduce the hang with trainer TP and vLLM TP enabled. Trace rollout completion, barriers, and subsequent trainer collectives; done means a minimal supported reproduction identifies whether ordering is unsafe and a regression test or documented limitation verifies the resolution.

Written by the indexing model from the issue text.

Assessment

Tech stack
python, pytorch
Domain
distributed-systems, machine-learning
Issue type
Bug
Difficulty
5/5
Estimated time
Over a week
Activity status
Quiet
Clarity
Needs clarification
Newbie friendliness
25/100

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