Use RISC-V Sstc extension

Enables RustyHermit to manage timers without trapping to m-mode or to the hypervisor.

https://docs.riscv.org/reference/isa/v20260120/priv/sstc.html
> This extension serves to provide supervisor mode with its own CSR-based timer interrupt facility that it can directly manage to provide its own timer service (in the form of having its own stimecmp register) - thus eliminating the large overheads for emulating S/HS-mode timers and timer interrupt generation up in M-mode. Further, this extension adds a similar facility to the Hypervisor extension for VS-mode.

As long as RustyHermit supports hardware not compliant with RVA23 profile, we need to support both mechanisms.

Options:
1. Detect availability of Ssct extension at runtime by parsing the fdt.
2. Add feature flag.

Start by reading the linked RISC-V Sstc specification and tracing RustyHermit's existing timer handling. Compare runtime FDT detection with a feature flag while preserving support for hardware without the RVA23 profile. Done means supervisor timers use Sstc when available and the existing mechanism remains supported otherwise.

Written by the indexing model from the issue text.