Support temporal logic assertions
Open
dslx
enhancement
ir
- Dominant language
- C++
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Description
So that designers can utilize assertions akin to the assertions they are used to in SV, DSLX/XLS should support somthing akin to SV's LTL assertions.
Note that one complication is that unlike verilog, an XLS proc does not have an exact notion of a clock or about the latency/sequence of operations.
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