Improving dynamic dispatch for multiple targets for x86-64/AArch64/PPC64

There are some dynamic dispatch scenarios that require compiling the same C++ source files more than once (but with different C++ flags for some of the compilation phases), such as x86-64 with MSVC if AVX2/AVX3 targets are enabled, AArch64 if SVE/SVE2 targets are enabled, or PPC if PPC8/PPC9/PPC10 targets are enabled.

Here are the compilation phases for multi-phase compilation with MSVC on x86-64:
- Compilation phase 1
- compile with '-DHWY_WANT_SSSE3 -DHWY_WANT_SSE4' enabled
- compile without '-arch:AVX2' or '-arch:AVX512' flags
- compile with AVX2/AVX3 targets disabled
- Compilation phase 2 (if AVX2 is enabled)
- compile with only AVX2 targets enabled
- compile with '-arch:AVX2' flag
- Compilation phase 3 (if AVX3 is enabled)
- compile with only AVX3 targets enabled
- compile with '-arch:AVX512' flag
- Compilation phase 4
- compile with all supported targets enabled (including AVX2/AVX3 targets)
- compile without '-arch:AVX2' or '-arch:AVX512' flags
- Dynamic dispatch code is compiled in this phase

Here are the compilation phases for multi-phase compilation for AArch64 with SVE/SVE2 enabled:
- Compilation phase 1
- compile without '-march=armv8-a+sve' or '-march=armv8-a+sve2'
- compile with SVE/SVE2 targets enabled
- Compilation phase 2 (if SVE targets are enabled)
- compile with '-march=armv8-a+sve' option
- compile with only SVE targets (but not SVE2 targets) enabled
- Compilation phase 3 (if SVE2 targets are enabled)
- compile with '-march=armv8-a+sve2' option
- compile with only SVE2 targets enabled
- Compilation phase 4
- compile with all supported targets enabled (including SVE/SVE2 targets)
- compile without '-march=armv8-a+sve' or '-march=armv8-a+sve2' flags
- Dynamic dispatch code is compiled in this phase

Here are the compilation phases for multi-phase compilation for PPC64:
- Compilation phase 1 (if baseline target does not support POWER8 vector instructions)
- compile with '-mcpu=powerpc64' on big-endian PPC or '-mcpu=powerpc64le' on little-endian PPC
- compile with only SCALAR or EMU128 target enabled
- Compilation phase 2 (if PPC8 target is enabled)
- compile with '-mcpu=power8' option
- compile with only PPC8 target enabled
- Compilation phase 3 (if PPC9 target is enabled)
- compile with '-mcpu=power9' option
- compile with only PPC9 target enabled
- Compilation phase 4 (if PPC10 target is enabled)
- compile with '-mcpu=power10' option
- compile with only PPC10 target enabled
- Compilation phase 5
- compile with all supported targets enabled (including PPC8/PPC9/PPC10)
- compile with the '-mcpu=' option of the baseline target
- Dynamic dispatch code is compiled in this phase

There are real-world use cases for multiple compilation dynamic dispatch, including improved performance on PPC9/PPC10/AArch64.