run_dma delay actually waits 166 machine cycles

This subroutine in "Best practices" is supposed to delay for 160 machine cycles:

```
run_dma:
ld a, HIGH(start address)
ldh [$FF46], a ; start DMA transfer (starts right after instruction)
ld a, 40 ; delay for a total of 4×40 = 160 M-cycles
.wait
dec a ; 1 M-cycle
jr nz, .wait ; 3 M-cycles
ret
```

It actually delays for 166 machine cycles (because ld a, 40 takes 2 and ret takes 4). I have not tested it yet, but can't we load the accumulator with 39 instead of 40 and reduce wait time by about 2.5%?