Bitread Architecture Error Message
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- SystemVerilog
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Description
Currently when using the bitread tool, the architecture defaults to the 7 series. When a bitstream is given of a different architecture such as Ultra Scale, this is the error messgae:
`Part file not found or invalid`
Perhaps the message could be changed to show that the architecture could also be the reason of the error. Or maybe a separate error message when the architecture is incorrect but the part is actually recognized? I don't know how hard that would be, or how resource intensive that would be.
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