Render LUT diagram

[](https://symbiflow.github.io/summer-of-code)

# Brief explanation

Render FPGA LUTs as a digital circuit diagram.

# Detailed Explanation

[FPGA](https://en.wikipedia.org/wiki/Field-programmable_gate_array) devices use look-up table ([LUT](https://en.wikipedia.org/wiki/Lookup_table#Hardware_LUTs)) to implement arbitrary [combinatorial logic](https://en.wikipedia.org/wiki/Combinational_logic).

for `N` bit LUT configuration can be represented as an `2^N` long number.

Most typical LUTs are LUT4 with `N = 4` with `2^N = 16` bit config word shown on the figure below.


Mux representation of LUT is not the most human-readable one.

Any configuration of the LUT can be rendered as a digital circuit diagram.


https://github.com/drom/icedrom -- is an JavaScript libratry that can render LUT config as digital circuit diagram.

**Read more HERE** https://observablehq.com/@drom/lut4-decoder