examples: on-target benchmark example for the energy/latency rig (Pico 2, phase markers, CYCCNT CSV)

Closes the hardware-in-the-loop gap from the 2026-07-20 SOTA review: we have accuracy and memory numbers for FLOAT32 vs SYM_INT32 training, but no on-target energy/latency numbers. The measurement rig (Pico 2 + Debug Probe + source-meter power profiler) is assembled; what is missing is the firmware side — a benchmark example target the rig can flash and measure.

## Scope

- New `examples/benchmark` target(s) cross-compiled for RP2350 (Pico 2): pico-sdk as a CMake preset next to the existing arm-gcc cross presets (arm toolchain is already in devenv.nix).
- Models reused from `examples/` (HAR classifier first; KWS/MNIST later as a suite), each in FLOAT32 and SYM_INT32 configuration.
- Phase markers: GPIO toggles (GP2 upward) around forward / backward / optimizer-step so an external logic/power analyzer can attribute energy per phase — the conceptual counterpart of the `traceSink_t` observer hooks (PR #260), same hook points in the training loop.
- Latency: DWT `CYCCNT` (Cortex-M33) per phase, emitted as CSV over UART, for cross-validation of cycles/step against the analyzer's energy integral.
- Fixed system clock (`set_sys_clock_khz`), value logged in the CSV header.
- N identical training steps per measurement window (e.g. 100), so per-step numbers amortize marker jitter and serial sample loss.

## Acceptance

- A CMake preset (name TBD) builds a flashable `.elf`/`.uf2` for at least HAR FLOAT32 + sym8.
- UART CSV contains: clock, config id, per-phase cycle counts, loss (sanity check).
- Marker pins toggle exactly around the measured phases (verifiable on a logic port).

Host-side measurement automation (flash → sample → integrate → CSV) is a separate script project outside this repo's C build and not part of this issue.

Optional later: RP2040 (Pico 1) build as a soft-float contrast point — no DWT cycle counter there, use `time_us_64()`.

Start by inspecting the existing examples/, arm-gcc cross presets, and devenv.nix, then review the HAR model configuration and the traceSink_t hook points from PR #260. The work is done when a Pico 2 RP2350 preset builds a flashable HAR FLOAT32 and sym8 image, with UART CSV fields for clock, config, per-phase cycles, and loss, and phase markers around the measured training phases.

Written by the indexing model from the issue text.