eclipse-iceoryx / eclipse-iceoryx/iceoryx
Extending iceoryx over PCIe shared memory
- Dominant language
- C++
- Stars
- 2.2k
- Forks
- 492
- Avg merge
- 18h 57m
- Merged PRs (30d)
- 1
Description
## Shared memory over PCIe
We could have multiple SOCs connected together with PCIe. Memory can be shared in the PCIe space.
Love to hear thoughts on how Iceoryx could be used to extend across multiple processors. Maybe running roudi instances in each SOC which perform the co-ordination?
Contributor guide
Research direction
The issue names no files, tests, or entry points. Start by reviewing the project architecture and the PCIe shared-memory constraints, then determine whether separate roudi instances per SoC can coordinate safely. Done would require an agreed design and a concrete implementation scope, which this issue does not yet define.
Written by the indexing model from the issue text.
Assessment
- Tech stack
- cpp
- Domain
- distributed-systems, embedded-iot
- Issue type
- Feature
- Difficulty
- 5/5
- Estimated time
- Over a week
- Activity status
- Stale
- Clarity
- Needs clarification
- Newbie friendliness
- 20/100