dmlc / dmlc/dlpack

Need for indicating alignment/padding?

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#190 1 comment 0 reactions 0 assignees View on GitHub
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C++
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Description

Right now I am not sure there is a large need for this, as in most cases importers can discover the data alignment itself quickly from the pointer and e.g. CUDA base allocations are padded to 256 bytes.

But it came up once more as a question whether we could indicate alignment and ISTR at least some discussion around it a long time ago. So if there is a compelling use-case it would seem reasonable to me to add this.

One way I think this could be done cheaply, is to:
* Use 4 bits (`uint4`) of the flag space to store a power of two alignment (`alignment = 2**uint4_val`).
* Either assuming a padded allocation or using an additional bit to indicate that the allocation is padded to allow large loads (writes?).

(Of course one could also extend the struct, this just seems like a smaller decision to use a bit of flag space even if not quite unlimited.)

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Research direction

Start with issue #190 and clarify the compelling alignment or padding use case, since no files or tests are identified. Compare the proposed four-bit power-of-two alignment flag, an additional padded-allocation bit, and extending the struct; done means an agreed design with its allocation and large-load semantics documented.

Written by the indexing model from the issue text.

Assessment

Tech stack
cpp
Domain
api
Issue type
Feature
Difficulty
5/5
Estimated time
Over a week
Activity status
Active
Clarity
Needs clarification
Newbie friendliness
30/100

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