[Sisyphus] phase-2 / zcc / Wave 5 — IR (typed SSA)

## Scope
Lower the sema-validated AST into a typed SSA intermediate representation.

## Deliverables
- `phase2/zcc/src/ir.zig` — IR definitions (typed SSA with explicit opcodes).
- `phase2/zcc/src/irgen.zig` — AST → IR lowering pass.

## IR Design Requirements
- Typed SSA: every value has a type; defs dominate uses.
- Explicit conversion ops: trunc, zext, sext, fptrunc, fpext, fptoui, fptosi, uitofp, sitofp, ptrtoint, inttoptr, bitcast.
- Atomic ops: load/store/add/sub/and/or/xor/xchg with memory ordering.
- `alloca` for VLAs and local arrays.
- Control flow: `br`, `cond_br`, `switch`, `loop`, `return`, `unreachable`.
- Function calls with ABI type lowering.

## Success Criteria
1. Every `phase1/c11-ref/001..023.c` produces a stable IR golden output (deterministic across runs).
2. IR validates: SSA form, type consistency, all uses dominated by defs.
3. IR size is comparable to clang `-emit-llvm` at `-O0` (within 2×).

## Dependencies on Prior Waves
- **Wave 0–4** — AST must be semantically valid before lowering.

## Suggested Role Assignment
`ir-engineer`

## Test Corpus Expectations
- Golden IR files for `001..023`; `zig build test` diffs generated IR against goldens.

Read phase2/zcc/src/ir.zig and phase2/zcc/src/irgen.zig, then inspect the sema-validated AST and the phase1/c11-ref/001..023.c corpus. Run zig build test to understand the golden-IR workflow. Done means all 23 inputs produce deterministic golden IR that validates for SSA, types, and dominance and remains within the stated size target.

Written by the indexing model from the issue text.