bytecodealliance / bytecodealliance/wasmtime

fuzzgen: Add SIMD only mode

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Description

👋 Hey,

#### Feature

We should add a SIMD only mode to fuzzgen. Where every input generates at least one vector variable or maybe a vector instruction.

#### Benefit

This would have been really useful when developing the RISC-V SIMD backend since I was only really interested in fuzzing the newer SIMD instructions.

#### Implementation

An easy way to do this is to check the signature of every function generated by fuzzgen and reject it if it does not contain a vector type.

I think it would be nice to have this as an environment flag so that it would be usable during development.

#### Alternatives

We don't have to do this, fuzzgen will theoretically reach those inputs eventually. But in my experience it takes quite a while to generate the same coverage as doing this would.

cc: @alexcrichton

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