Cranelift: "bus error" with unaligned atomics on AArch64

👋 Hey,

Fuzzgen found this on AArch64.

### `.clif` Test Case

```
test run
target aarch64
target s390x
target riscv64
target x86_64

function %a(i32) -> i32 system_v {
ss0 = explicit_slot 14

block0(v0: i32):
v1 = stack_addr.i64 ss0+1
atomic_store v0, v1
return v0
}

; run: %a(0) == 0
```

### Steps to Reproduce

* `clif-util test ./the-above.clif`

This test does not crash in QEMU, only in a real AArch64 machine.

### Expected Results

I would expect this to either pass or fail to compile. According to the docs, the instruction should not be allowed to trap, since it does not have the [`aligned` flag](https://docs.rs/cranelift-codegen/latest/cranelift_codegen/ir/struct.MemFlags.html#method.aligned).

> By default, Cranelift memory instructions work with any unaligned effective address. If the aligned flag is set, the instruction is permitted to trap or return a wrong result if the effective address is misaligned.

### Actual Results

```
ubuntu@instance-20220805-0848:~/git/wasmtime/cranelift$ cargo run -- test ./lmao.clif
Finished dev [unoptimized + debuginfo] target(s) in 0.16s
Running `/home/ubuntu/git/wasmtime/target/debug/clif-util test ./lmao.clif`
Bus error (core dumped)
```

### Versions and Environment

Cranelift version or commit: main
Operating system: Linux
Architecture: AArch64

### Extra Info

Maybe we should restrict the current lowering to only if the `aligned` flag is present?