x86-64 pointer tagging is unsound on most recent Intel CPUs (Ice Lake)

According to the boost::lockfree [documentation](https://www.boost.org/doc/libs/1_72_0/doc/html/lockfree/rationale.html) and from what I can see from boost/lockfree/detail/tagged_ptr_ptrcompression.hpp, the implementation of the free-list stores a 16-bit tag value in the upper bits of a 64-bit pointer.

Most recent Intel x86_48 microarchs (Ice Lake) use 5-level page tables and 57-bit virtual addresses, meaning this technique of pointer tagging can fail unexpectedly when used on such a processor.

Start with boost/lockfree/detail/tagged_ptr_ptrcompression.hpp and compare its pointer-tagging assumptions with the linked Boost.Lockfree rationale documentation. Determine how the implementation behaves with 57-bit virtual addresses on Ice Lake; done means the free-list no longer relies on an invalid upper-bit assumption and the behavior is documented or covered by an appropriate validation.

Written by the indexing model from the issue text.