CPU: CLI/SEI/PLP interrupt inhibit delay and BRK/NMI hijacking not implemented

## Summary

Two advanced interrupt timing behaviors are not implemented:

### 1. Interrupt inhibit delay

Changes to the I flag via CLI, SEI, or PLP should take effect **after** the current instruction's interrupt poll. This means CLI followed by an immediately pending IRQ should not take the IRQ until the next instruction.

### 2. BRK/IRQ NMI hijacking

When NMI coincides with BRK or IRQ, real hardware redirects to the NMI vector instead. The BRK instruction still pushes the B flag, but the vector used is $FFFA instead of $FFFE.

Both are known AccuracyCoin failures and affect a small number of games/demos.

## References

- [CPU interrupts](https://www.nesdev.org/wiki/CPU_interrupts)

Start with the CPU interrupt handling and the linked nesdev CPU interrupts reference. Verify the CLI, SEI, and PLP polling delay, then check BRK/IRQ behavior when NMI coincides, including the pushed B flag and NMI vector. Done means both behaviors are implemented and the AccuracyCoin failures pass.

Written by the indexing model from the issue text.