CPU: IRQ and reset interrupt handlers missing proper cycle timing
Open
accuracy
bug
component: cpu
difficulty: medium
priority: medium
- Dominant language
- JavaScript
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Description
## Summary
### doIrq() missing dummy read PPU cycles
`doNonMaskableInterrupt()` correctly has 2 dummy PPU steps at the start (cycles 1-2 of the interrupt sequence), but `doIrq()` jumps straight to pushing the return address. The PPU is 6 dots short during IRQ handling.
### doResetInterrupt() incomplete
Missing:
- 3 dummy push cycles (stack pointer decrement without writing)
- I flag set to 1
- 5 of the 7 PPU step cycles (only has the 2 for vector fetch)
These affect PPU-CPU synchronization during interrupts.
## References
- [CPU interrupts](https://www.nesdev.org/wiki/CPU_interrupts)
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