Add a set of co-proccesor constraint_setting (feature request)

This is a similar suggestion to #13 but more generic and could include other secondary processors. This could include fpu's, gpgpu's, ai proccesors, simd extensions, dsp extensions, fpga's etc.

An example of this might look like;

coproccesor/BUILD

```python
licenses(["notice"])
package(
default_visibility = ["//visibility:public"],
)

constraint_setting(name = "fpu")

# Cortex-M4 optional fpu
constraint_value(
name = "VFPv4_SP",
constraint_setting = ":fpu",
)

# Cortex-M7 optional fpu
constraint_value(
name = "VFPv5_D16",
constraint_setting = ":fpu",
)

constraint_setting(name="dsp")

constraint_value(
name = "cortex_m_dsp",
constraint_setting = ":dsp",
)

constraint_setting(name="ai")

constraint_value(
name = "coral_edge_tpu",
constraint_setting = ":ai",
)

constraint_setting(name="gpgpu")

constraint_value(
name = "amd-opencl",
constraint_setting = ":gpgpu",
)

constraint_value(
name = "nvidia-cuda",
constraint_setting = ":gpgpu",
)
```

There is one caveat with using bazel platforms/constraint settings here and that is if you had a device that could support two constraint_values for a given constraint_setting. Say that you put a "AMD" and a "nvidia" gpgpu into a device you couldn't specify multiple values for the 'gpgpu' constraint_setting. This could be a common recurring problem, specifically with integrated+dedicated gpgpu devices.

Start by comparing this request with issue #13 and reviewing the repository's existing platform and constraint definitions. Clarify which secondary-processor constraint settings and values should be supported, including how devices with multiple accelerator types should be represented. Done means an agreed design and an implementation scope that addresses the multi-value caveat.

Written by the indexing model from the issue text.