Bug: Multi-versioning CUDA kernels

### Describe the bug

Our current compilation method, focusing on `sm90a` is too constraining. Built-in NVCC multi-versioning is too tricky to use and results in bloated binaries. So we should find a better way to pre-compile and pre-package PTX and/or SASS for a small set of generations. Likely: Volta, Ampere, Hopper, Blackwell.

### Steps to reproduce

Try to run StringWa.rs benchmarks in a 4060 machine.

### Expected behavior

Passing conpilation.

### StringZilla version

v4

### Operating System

22.04

### Hardware architecture

x86

### Which interface are you using?

C implementation

### Contact Details

_No response_

### Are you open to being tagged as a contributor?

- [x] I am open to being mentioned in the project `.git` history as a contributor

### Is there an existing issue for this?

- [x] I have searched the existing issues

### Code of Conduct

- [x] I agree to follow this project's Code of Conduct

Start by reproducing the StringWa.rs benchmarks on an RTX 4060 and inspect the current NVCC compilation path centered on sm90a. Compare approaches for pre-compiling and packaging PTX and/or SASS for Volta, Ampere, Hopper, and Blackwell. Done means the C interface compiles and the benchmarks run on the affected generation without unnecessarily bloated binaries.

Written by the indexing model from the issue text.