arm-education / arm-education/Graphical-Micro-Architecture-Simulator

Problems with C & V flags when using the SUBS instruction

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JavaScript
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Description

Hi,
I have encountered issues that arise from the setting of the C and V flags when trying to use conditional branches (B.HI and B.LE)

The sequence
movz x1, #36
movz x2, #54
subs x5, x1, x2
b.LE lse
does not work properly. The V flag is set but 36-54 = -18 is not a signed overflow.

The sequence
movz x1, #54
movz x2, #36
subx x5, x1, x2
b.GT gtr
does not work properly as 54-36=18 does not set the carry bit as it should.

In the setVflag(long result, long op1, long op2) {
replacing

with
Vflag = (((long) op1 & 0x80000000L) == ((long) op2 & 0x80000000L)) && ((long) result != (long)op1;
may work but I don't have the experience with GWT projects to rebuild.

I haven't had a chance to figure the issue with setting the C flag in the other scenario.

Thanks,
Dave

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Research direction

Locate the setVflag(long result, long op1, long op2) implementation and reproduce the reported SUBS sequences using B.LE and B.GT. Check the C- and V-flag behavior for both scenarios; done means the cited conditional branches behave correctly, including the unresolved C-flag case.

Written by the indexing model from the issue text.

Assessment

Tech stack
javascript
Domain
tooling
Issue type
Bug
Difficulty
4/5
Estimated time
3-5 days
Activity status
Stale
Clarity
Needs clarification
Newbie friendliness
25/100

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