Allow `verbatim` in Solidity `assembly` blocks

There is currently support for `verbatim`, allowing to instert arbitrary bytecode, but only when compiling in strict assembly mode. But the `verbatim` group of functions ios not available inside `assembly` blocks in Solidity code. Example:

```
function f() {
assembly {
verbatim_0i_0o(hex"c0")
}
}
```

When compiling with `solc`:

```
Error: Function "verbatim_0i_0o" not found.
```

What is the motivation for disabling verbatim in Solidity? I understand that it must be used with care and only for very specific reasons. My use case is that I am targetting a forked version of the EVM interpreter with new opcodes. I'm currently unable to use `solc` to compile contracts targetting this fork.

Thanks!

Start by reproducing the example with solc and compare verbatim handling in strict assembly with Solidity assembly blocks. Trace the compiler entry point that reports "Function \"verbatim_0i_0o\" not found" and identify the existing verbatim support. Done means the example compiles in a Solidity assembly block while preserving the intended safety restrictions.

Written by the indexing model from the issue text.