Improve baudrate configuration in HardwareSerial

Currently, HardwareSerial on AVR calculates the UART BRR register value by enabling "double speed" mode by default, and only when the speed is too low for that, it falls back to regular mode. In general, this gives fine result and, due to the reduced multiplier in double speed mode, gives better accuracy (in terms of baud rate deviation, see the table with examples in the datasheet). However, the (2560) datasheet also says:

> Setting this bit will reduce the divisor of the baud rate divider from 16 to 8, effectively doubling
the transfer rate for asynchronous communication. Note however that the Receiver will in this
case only use half the number of samples (reduced from 16 to 8) for data sampling and clock
recovery, and therefore a more accurate baud rate setting and system clock are required when
this mode is used. For the Transmitter, there are no downsides.

In cases where the baudrate deviation (due to rounding) is the same with "double speed" enabled or disable (such as 9600 at 16Mhz), it would make sense to *disable* "double speed" mode, to get more samples per clock period.

To implement this, you would likely need to calculate both options, and then use the non-double-speed option when it is available (e.g. at all but the max speed) and the deviation is equal to the double-speed option (I think it can't be smaller by definition).

This isn't something that is very essential to implement soon, but I came across this in the datasheet and it seemed good to note down this observation somewhere.

Start at the HardwareSerial AVR baud-rate calculation and consult the ATmega2560 datasheet section on double-speed sampling. Compare the regular and double-speed options for equal baud-rate deviation, then verify that the non-double-speed option is selected where appropriate. Done means the calculation preserves accuracy while using more receiver samples when the deviations are equal.

Written by the indexing model from the issue text.