LPC17_40: UART set the buadrate jump to the Infinite loop

This was Issue 173 in the old Bitbucket repository

Former user
created an issue 2019-10-09

In arch/arm/src/lpc17xx_40xx/lpc17_40_serial.c, function ioctrl:

lcr = getreg32(priv->uartbase + LPC17_40_UART_LCR_OFFSET);
up_serialout(priv, LPC17_40_UART_LCR_OFFSET, (lcr | UART_LCR_DLAB));

/* Set the BAUD divisor */

#ifdef LPC176x
dl = lpc17_40_uartdl(priv->baud, priv->cclkdiv);
#else
dl = lpc17_40_uartdl(priv->baud);
#endif

up_serialout(priv, LPC17_40_UART_DLM_OFFSET, dl >> 8);
up_serialout(priv, LPC17_40_UART_DLL_OFFSET, dl & 0xff);

/* Clear DLAB */

up_serialout(priv, LPC17_40_UART_LCR_OFFSET, lcr);

the DLAB can only write during the uart reg 0x7C USR bit 0 is clear。 when the uart is busy the setting will cause the IIR[3:0] = 0111

UART_16550_COMPATIBLE = NO and master has tried to write to the Line Control Register while the DW_apb_uart is busy (USR[0] is set to 1).

Start in arch/arm/src/lpc17xx/lpc17_40_serial.c at ioctrl and review the LPC17_40 UART LCR, DLM, DLL, USR, and IIR definitions. Trace the baud-divisor update while the UART is busy and compare it with the documented DLAB and USR behavior. Done means changing the baudrate no longer leads to the reported infinite loop or incompatible UART status.

Written by the indexing model from the issue text.