Xilinx / Xilinx/libsystemctlm-soc
bugs for the GetWriteToSNDone() check in ProcessResp_SN
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- Verilog
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Description
Hi sir,
I found there may a bug in the ProcessResp_SN @L2663,
because SetWriteToSNDone is called in two place:
1. req->SetWriteToSNDone(true); @L2653
2. req->SetWriteToSNDone(true); @L2694 which will never be called, because the code only run to L2694 when the return value of GetWriteToSNDone() is already true !
so the condition @ L2663 can only be true because the code ran to L2653 ever
but the code can only run to L2653 when the Comp from SN has already received which is when both condition below are true
- (rsp.IsCompDBIDResp() || rsp.IsDBIDResp()) @L2609
- (rsp.IsCompDBIDResp() || req->GetCompSNReceived()) @ L2622
so when the Comp from RN aready is reveived by INC, it will never be reveived again , so the branch if (req->GetWriteToSNDone()) @L2663 seems useless !
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Research direction
Start in tlm-modules/iconnect-chi.h at ProcessResp_SN and inspect the linked lines around 2609, 2622, 2653, 2663, and 2694. Trace the conditions that set and check GetWriteToSNDone(), then look for relevant callers or tests. Done means the control flow is confirmed and the issue's suspected unreachable branch or condition has an agreed, verified resolution.
Written by the indexing model from the issue text.
Assessment
- Tech stack
- cpp
- Domain
- embedded-iot
- Issue type
- Bug
- Difficulty
- 4/5
- Estimated time
- 3-5 days
- Activity status
- Stale
- Clarity
- Needs clarification
- Newbie friendliness
- 35/100