PMUFW: Missing pin group for QSPI in single mode
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Description
Depending by the QSPI mode, a reduced pin set is used by the controller. (e.g. "single" qspi mode -> MIO0 to MIO5).
The PMU firmware, however, doesn't provide such reduced pin-groups for the QSPI function.
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First steps
- Read the whole issue, then the project's contributing guide.
- Comment on the issue to say you are picking it up — it saves two people doing the same work.
- Fork the repository and make your change on a branch.
- Open a pull request that references the issue number.
Research direction
Start by locating the PMU firmware definitions for QSPI pin groups and compare the groups provided for each QSPI mode. Confirm how single mode maps to MIO0 through MIO5. Done means the PMU firmware exposes the reduced single-mode pin group alongside the existing QSPI groups.
Written by the indexing model from the issue text.
Assessment
- Domain
- embedded-iot
- Issue type
- Bug
- Difficulty
- 4/5
- Estimated time
- 3-5 days
- Activity status
- Stale
- Clarity
- Needs clarification
- Newbie friendliness
- 30/100