Issue in example code of cyclic mode + AXI DMA
Nobody has claimed this yet.
- Dominant language
- HTML
- Stars
- 1.2k
- Forks
- 1.1k
- PR merge metrics
- No merged PRs in 30d
Description
Hi,
In the xaxidma_example_sgcyclic_intr.c,
The cyclic mode setup of TxDMA [MM2S] does NOT follow the [AXI DMA v7.1 14 PG021 April 4, 2018]
"This bit should be set/unset only when the DMA is idle or when not running. Updating this bit while the DMA is running can result
in unexpected behavior."
Code: -
in Txsetup(), the DMA engine is started
in TxSetup() --> XAxiDma_BdRingStart() --> XAxiDma_StartBdRingHw() --> the bit of XAXIDMA_CR_RUNSTOP_MASK is set in this function
and in SendPacket() [a much later function in the code flow], the bit of XAXIDMA_CR_CYCLIC_MASK is set in
XAxiDma_SelectCyclicMode()
This goes against the Xilinx official document.
Thanks
Contributor guide
No contributing guide indexed for this repository
First steps
- Read the whole issue, then the project's contributing guide.
- Comment on the issue to say you are picking it up — it saves two people doing the same work.
- Fork the repository and make your change on a branch.
- Open a pull request that references the issue number.
Research direction
Read Xilinx/embeddedsw/XilinxProcessorIPLib/drivers/axidma/examples/xaxidma_example_sgcyclic_intr.c, tracing TxSetup(), SendPacket(), XAxiDma_BdRingStart(), XAxiDma_StartBdRingHw(), and XAxiDma_SelectCyclicMode(). Compare this flow with AXI DMA v7.1 PG021, then verify that cyclic-mode configuration complies with the idle-or-not-running requirement.
Written by the indexing model from the issue text.
Assessment
- Tech stack
- c
- Domain
- embedded-iot
- Issue type
- Bug
- Difficulty
- 3/5
- Estimated time
- 1-2 days
- Activity status
- Stale
- Clarity
- Clearly specified
- Newbie friendliness
- 35/100