Xilinx / Xilinx/embeddedsw

uartps interrupt is not working

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Description

My board is the Zynq UltraScale+ MPSoC ZCU102 Evaluation Kit, and I need to port the UARTPS driver to run on the PMU. When I execute xuartps_intr_example.c, it hangs within the while loop at line 285. I suspect that the UART interrupt handler is not working.

My UART0 is used for printing logs, and UART1 is used for transmitting data.

The following are my configurations. I have no idea where the problem is. I would appreciate it if someone could help me resolve it. Thank you.

#define INTC		                        XIntc
#define INTC_DEVICE_ID		1
#define UART_INT_IRQ_ID		54
XUartPs_Config XUartPs_ConfigTable[XPAR_XUARTPS_NUM_INSTANCES] = {
	{
		(u16)XPAR_XUARTPS_0_DEVICE_ID,           // 0
		(u32)XPAR_XUARTPS_0_BASEADDR,            // 0xFF000000
		(u32)XPAR_XUARTPS_0_UART_CLK_FREQ_HZ,    // 99990005
		(s32)0
	},
	{
		(u16)XPAR_XUARTPS_1_DEVICE_ID,           // 1
		(u32)XPAR_XUARTPS_1_BASEADDR,            // 0xFF010000
		(u32)XPAR_XUARTPS_1_UART_CLK_FREQ_HZ,    // 99990005
		(s32)0
	}
};  
#define XPAR_XINTC_NUM_INSTANCES      2          /* Number of instances */

#define XPAR_INTC_0_DEVICE_ID         1          /* Device ID for instance */
#define XPAR_INTC_0_BASEADDR          0x70800000 /* Register base address */
#define XPAR_INTC_0_ACK_BEFORE        0xFFFF00FF /* Ack timing, before/after */

#define XPAR_INTC_1_DEVICE_ID         2          /* Device ID for instance */
#define XPAR_INTC_1_BASEADDR          0x70800020 /* Register base address */
#define XPAR_INTC_1_ACK_BEFORE        0xFFFF00FF /* Ack timing, before/after */

XIntc_Config XIntc_ConfigTable[XPAR_XINTC_NUM_INSTANCES] = {
	{
        XPAR_INTC_0_DEVICE_ID,	/* Unique ID  of device */
        XPAR_INTC_0_BASEADDR,	/* Register base address */      
        XPAR_INTC_0_ACK_BEFORE,	/* Ack before or after service */
        0			            /* Device options */
	 }
	,
	{
        XPAR_INTC_1_DEVICE_ID,	/* Unique ID  of device */
        XPAR_INTC_1_BASEADDR,	/* Register base address */
        XPAR_INTC_1_ACK_BEFORE,	/* Ack before or after service */
        0			            /* Device options */
	 }
};

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First steps

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  2. Comment on the issue to say you are picking it up — it saves two people doing the same work.
  3. Fork the repository and make your change on a branch.
  4. Open a pull request that references the issue number.

Research direction

Start with XilinxProcessorIPLib/drivers/uartps/examples/xuartps_intr_example.c, especially the loop at line 285 and the UART interrupt handler at line 333. Review the supplied UARTPS and XIntc configurations and verify how UART1 and interrupt 54 are connected on the PMU. Done means the interrupt example no longer hangs and UART1 interrupts are handled while UART0 continues logging.

Written by the indexing model from the issue text.

Assessment

Tech stack
c
Domain
embedded-iot
Issue type
Bug
Difficulty
4/5
Estimated time
3-5 days
Activity status
Stale
Clarity
Needs clarification
Newbie friendliness
25/100

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