Xilinx / Xilinx/embeddedsw

Bug in function Xil_DCacheInvalidateRange when compiling with USE_AMP=1 (infinite loop)

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Description

Function "Xil_DCacheInvalidateRange" has an infinite loop possibility when USE_AMP=1
This has taken me days of head scratching with lock-ups on Core1 of Zynq device....

The offending lines are:
while (tempadr < endaddr) {
#ifndef USE_AMP
/* Invalidate L2 cache line */
*L2CCOffset = tempadr;
Xil_L2CacheSync();
tempadr += cacheline;
#endif
}
As you can see, if USE_AMP is 1 then while loop can possibly execute and never exit....

Just realised this was already spotted in issue #254

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First steps

  1. Read the whole issue, then the project's contributing guide.
  2. Comment on the issue to say you are picking it up — it saves two people doing the same work.
  3. Fork the repository and make your change on a branch.
  4. Open a pull request that references the issue number.

Research direction

Start with the Xil_DCacheInvalidateRange function and the while loop shown in the issue, then compare the related report in issue #254. Confirm the USE_AMP=1 path cannot remain in the loop indefinitely, and verify the behavior on the affected Zynq Core1 configuration.

Written by the indexing model from the issue text.

Assessment

Tech stack
c
Domain
embedded-iot
Issue type
Bug
Difficulty
2/5
Estimated time
1-3 hours
Activity status
Stale
Clarity
Mostly clear
Newbie friendliness
35/100

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