Misplaced ifdef guard in xil_cache leads to endless loop
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Description
there is the #ifdef USE_AMP inside the while loop which means, that it is an endless loop.
My suggestion would be to include the while "header" inside the #ifdef guard as well.
#ifndef USE_AMP
while (tempadr < endaddr) {
/* Invalidate L2 cache line */
*L2CCOffset = tempadr;
Xil_L2CacheSync();
tempadr += cacheline;
}
#endif
Would that be correct?
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Research direction
Open lib/bsp/standalone/src/arm/cortexa9/xil_cache.c around lines 352-359 and inspect the USE_AMP guard surrounding the cache-invalidation while loop. Verify the preprocessor behavior and affected loop conditions; done means the USE_AMP configuration no longer enters an endless loop while the other configuration retains the intended cache handling.
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Assessment
- Tech stack
- c
- Domain
- embedded-iot
- Issue type
- Bug
- Difficulty
- 1/5
- Estimated time
- 1-3 hours
- Activity status
- Stale
- Clarity
- Clearly specified
- Newbie friendliness
- 52/100