Xilinx / Xilinx/embeddedsw

Window Watchdog offsets in xwdttb_hw.h don't match documentation pg128 register table.

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Description

The window watchdog timer offsets defined in xwdttb_hw.h for MWR up to STR, e.g.,

#define XWT_MWR_OFFSET 0x0000U

Should be increased by 0x0C.

Most users probably do not encounter this issue if their xparameters file increments the watchdog base address by 0xC, I imagine. However, it is non-obvious that the watchdog base configured in vivado is off by 0xC.

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First steps

  1. Read the whole issue, then the project's contributing guide.
  2. Comment on the issue to say you are picking it up — it saves two people doing the same work.
  3. Fork the repository and make your change on a branch.
  4. Open a pull request that references the issue number.

Research direction

Start with xwdttb_hw.h and compare the MWR-through-STR offsets against the pg128 register table referenced in the issue. Check how the watchdog base is represented in xparameters and configured in Vivado, then update the definitions so the documented offsets and configured base address agree.

Written by the indexing model from the issue text.

Assessment

Tech stack
c
Domain
embedded-iot
Issue type
Bug
Difficulty
2/5
Estimated time
1-3 hours
Activity status
Stale
Clarity
Mostly clear
Newbie friendliness
45/100

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